A reconfigurable system comprises hardware devices, such as field programmable gate array device (FPGA), that can be electrically programmed to perform various specific logic functions. Existing reconfigurable systems treat the reconfiguration process as one that is externally controlled from outside the reconfigurable system. For example, a processor, that is external to a reconfigurable system may be responsible for all reconfiguration.
As reconfigurable systems provide more programmable logic and on-board memory, it becomes increasingly important to consider self-reconfiguring systems. Such systems are able to stream configuration bits from a memory within the system to reconfigurable logic within the system, so that the system reconfigures itself without external assistance. Such systems are able to “load” a static configuration under its own control, much as conventional computer systems would load a program. A memory within such a system should be able to hold either data or reconfiguration commands according to application needs, much as a conventional computer system memory holds either data or programs.
As reconfigurable processors become more complex, it becomes increasingly important to re-load configurations within one subset of the chip without disrupting computation, or the loading of a configuration, within another subset of the chip. Much as a multiprocessor system supports the concurrent loading of independent programs on distinct processors, reconfigurable systems should support the concurrent loading of independent static configurations within disjoint subsets of a common reconfigurable chip.
Existing reconfigurable systems offer limited capabilities for configuring a subset of reconfigurable chip. In particular, such configuration can only be initiated over a predefined scope. For example, the entire chip, physical portions of the chip, or physical pages of the chip may be reconfigured. Such configuration is accomplished by broadcasting or shifting configuration bits onto the entire chip or a physical page within a chip. The unit of reconfiguration for a chip is determined when the chip is designed and cannot be changed by a user.